Two New Itanium 2s Feature Faster Front-Side Bus
Intel is shipping a pair of new Itanium 2 processors that aim to boost the chips’ performance in compute intensive applications by increasing bus transfer speeds.
Both new CPUs run at 1.6 GHz and provide a front-side bus (FSB) speed of 667 MHz, according to the Santa Clara, Calif.-based chip manufacturer. Previous Itanium 2s have an FSB speed of 400 MHz.
The increased bus speed is intended to boost throughput for connecting to and transferring data between the microprocessor, chipset and main memory. The faster FSB bandwidth enables computers built with the new CPUs to transfer data at speeds up to 10.6 gigabits per second between the processor to other system components. Current generation CPUs can only handle bus transfer speeds up to 6.4 Gbps, according to Intel.
Further, the improved bus design will be used in the forthcoming dual-core Itanium processor, code-named “Montecito.” In early July, Intel claimed a prototype system with two Montecito chips – that is, with four cores total – trounced a single-core, four-processor RISC system, by 45 gigaflops (billion floating point operations per second) to 27.5.
While Itanium’s impact on the overall server market has not meant the boom in sales and implementations, nor the ubiquitousness, that Intel originally envisioned, it has taken hold in higher-end compute intensive applications in the scientific, oil and gas, and government sectors. It has also been making headway in markets such as mainframe migration and RISC system replacement.
As such, any improvement in throughput is welcomed by those customers, says one analyst.
“It’s a nicely performing processor for the high end of some vendors’ product lines,” says Gordon Haff, senior analyst at research firm Illuminata in Nashua, N.H.
The new FSB speed also reassures customers of Intel’s commitment to Itanium 2, at least for the time being, Haff says.
“[These chips are] providing a good roadmap for those markets,” Haff says. “There’s an implicit requirement that you have these incremental enhancements for a processor to continue moving forward.”
In that regard, Haff says, the two new offerings will best suit applications where the ability to move more data in a very short period of time is critical to success, such as modeling weather or analyzing petroleum deposits.
Longer term, a parallel data bus approach like FSB will reach its limits and force Intel to move to a serial bus design more like AMD’s HyperTransport. “FSB is still working for Intel but they’ll have to make the move over time – parallel buses [like FSB] run out of speed after a while,” Haff says.
Hitachi announced it will use the new Itanium 2 processors in new Hitachi BladeSymphony servers set to ship within 30 days. Hitachi has designed a chipset -- the communications controller that coordinates between the processor and the rest of the computer -- to take advantage of the improved bus architecture.
Intel said it expects that systems running on the Montecito CPU will deliver up to twice the performance, up to three times the system bandwidth, and more than 2 1/2 times as much on-die cache as the current generation of Itanium processors.
The new Intel Itanium 2 processor 9 MB of cache costs $4,655 each in 1,000-unit quantities, while the one with 6 MB of cache costs $2,194 in 1,000-unit quantities.
Stuart J. Johnston has covered technology, especially Microsoft, since February 1988 for InfoWorld, Computerworld, Information Week, and PC World, as well as for Enterprise Developer, XML & Web Services, and .NET magazines.