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AMD's New Roadmap To Include Both x86 and ARM
AMD announced a new company roadmap in which it plans to support both x86 and ARM platforms in the near future.
The handwriting is on the wall for chipmaker AMD. Its internal estimates show that the use of x86 and ARM platforms will reach near parity in the next four years (Figure 1). On Monday, AMD launched its "ambidextrous computing" platform approach, embracing both platforms for client, server and embedded operating system markets.
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Figure 1. ARM and x86 growth. Source:
AMD's "Core Innovation Update" presentation, May 5, 2014.
AMD will provide a pin-compatible shared infrastructure, called "Heterogeneous System Architecture" (HSA), to support both 64-bit x86 chips and 64-bit ARM chips, sometimes on the same machine. The first AMD accelerated processing units (APUs) with this HSA technology are code-named "Kaveri."
The new ambidextrous computing roadmap currently has two projects, called "Project SkyBridge" and "K12."
The first project, SkyBridge, will start in 2015 and will consist of a new 20-nanometer product family of system-on-chip designs and accelerated processing units that will support x86 and ARM processors. Two 64-bit chips are envisioned under Project SkyBridge:
- An x86 "Puma+" CPU, and
- A low-power ARM Cortex-A57 core for Android
Both of these two Project SkyBridge chips will support AMD's Graphics Core Next and Secure Technology, along with integration as system-on-chip components.
The second project under the ambidextrous computing roadmap, K12, will roll out in 2016. It will feature a "new high-performance, low-power ARM-based core" using 64-bit technology, according to AMD's announcement.
AMD currently has a 64-bit Opteron A-Series processor that's based on the ARM designs, which is code-named "Seattle." The 28-nanometer Seattle chip was demonstrated on Monday in a press conference running Red Hat's Fedora Linux operating system. AMD's Seattle chip is aimed at the datacenter market, offering a power-efficient alternative to traditional x86-based servers. It has up to eight ARM Cortex-A57 cores with up to 4 MB of shared L2 and 8 MB of L3 cache memory.
The ambidextrous computing roadmap envisions support for future products ranging from dense server farms to "ultra-low power client" devices, according to AMD's roadmap chart (Figure 2):
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Figure 2. AMD's ambidextrous computing roadmap.
Source:
AMD's "Core Innovation Update" presentation, May 5, 2014.
About the Author
Kurt Mackie is senior news producer for 1105 Media's Converge360 group.